PART ONE: A Low Latency Kernel Recursive Least Squares Processor using FPGA Technology PART TWO: Grammar-based Feature Generation

PART ONE: Yeyong Pang and Nicholas Fraser PART TWO: Anthony Mihirana de Silva and Farzad Noorian (PART ONE: Harbin Instituite of Technology; University of Sydney PART TWO: University of Sydney)

NICTA SML SEMINAR

DATE: 2013-10-25
TIME: 14:00:00 - 15:00:00
LOCATION: NICTA - 7 London Circuit
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ABSTRACT:
PART ONE: The kernel recursive least squares (KRLS) algorithm performs non-linear regression in an online manner, with similar computational requirements to linear techniques. In this paper, an implementation of the KRLS algorithm utilising pipelining and vectorisation for performance; and microcoding for reusability is described. The design can be scaled to allow tradeoffs between capacity, performance and area. Compared with a central processing unit (CPU) and digital signal processor (DSP), the processor improves on execution time, latency and energy consumption by factors of 5, 5 and 12 respectively.

PART TWO: The success of machine learning (ML) methods, among other things, depends on a suitable choice of input features which are usually selected by domain-experts. We propose a systematic way for generating suitable features using context-free grammar. Proven feature selection techniques are used to develop better features in the expanded feature space. Feature generation and selection, based on wavelets and technical indicators, are combined using grammatical evolution where an initial population of well performing individuals are evolved. The proposed method is empirically demonstrated by predicting financial and electricity load time-series using kernel methods.
BIO:
PART ONE: o Yeyong Pang is PhD candidate at the School of Automatic Test and Control, Harbin Instituite of Technology. His research interests include Reconfigurable Computing, Embedded System Design, Real Time Video Processing with FPGA. Mr Pang's current research relates to low latency machine learning processor archetecture using FPGA technology. o Nicholas Fraser is PhD candidate at the School of Electrical and Information Engineering, University of Sydney. His research interests include non-linear modelling, audio and reconfigurable computing. Nicholas' current research relates to hardware architectures for kernel based machine learning algorithms.

PART TWO: o Anthony Mihirana de Silva graduated from the Department of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka in 2010 with a first class honours. He worked as a Software Engineer in low latency trading platform development in Sri Lanka before joining the Computer Engineering Laboratory, Department of Electrical and Information Engineering, University of Sydney in 2012, where he is pursuing a Masters degree. o Farzad Noorian is a PhD candidate at the School of Electrical and Information Engineering, University of Sydney. His interests range from parallel and cloud computing to computational intelligence and time-series prediction. Farzad's research involves foreign exchange risk management using techniques from machine learning and control theory.